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EE3408 Project Report: Design of High Speed Operational Amplifier
EE3408C - Integrated Analog Design
11 Pages • Essays / Projects • Year Uploaded: 2022
In this assignment we are implementing the Miller’s Operational Amplifier (Op-Amp) circuit. The Miller’s Op-Amp is chosen due to its simplicity and its ability to have a wider range of voltage swing as compared to the cascode and other types of the circuit. However, the Miller’s op-amp has issues regarding its stability and has to be compensated by adding a resistor and a capacitor. In our circuit, we want a high current in order to ensure we had a faster settling time as higher current means that the capacitor CGD of the common source amplifier would charge up faster and hence reducing the settling time. Thus, we decided to have a tail current of 70μA. We also choose a biasing voltage of 0.9V to ensure that all the MOSFETS are in saturation region. The compensation is done by adding a capacitor across the gate-drain of the common source amplifier to amplify the Miller’s effect. The addition of the capacitor splits the pole further apart and hence improving the phase margin in the open loop. Therefore, the gain peaking in the close loop would be lower and the circuit would also be stable in close loop. However it is important to take note that the capacitance should not be too high as it will result in a longer settling time.
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